NVIDIA's Nemotron 3 Ultra model, integrated with the Agentic Context Evolution (ACE)-RTL agent, demonstrates advanced capabilities in agentic Register Transfer Level (RTL) coding workflows. This combination leverages an iterative generate-test-reflect approach and RTL-specialized reasoning to address the increasing time limitations in modern chip design.
On the Comprehensive Verilog Design Problems (CVDP) benchmark, Nemotron 3 Ultra and ACE-RTL achieved a 97.1% average pass rate across nine agentic RTL task categories. This performance surpassed models such as GLM 5.2 and Kimi K2.6, while also using up to 71% fewer tokens per iteration.
Key Points
- NVIDIA Nemotron 3 Ultra is a 550B total-parameter, 55B active-parameter Mixture-of-Experts Hybrid Mamba-Attention model.
- The model was pretrained on 20 trillion text tokens and extended to a 1M-token context length.
- When paired with the ACE-RTL agent, Nemotron 3 Ultra achieved a 97.1% average pass rate on the CVDP benchmark.
- This combination used 6,629 tokens per iteration on average, which is 28% fewer than GLM 5.2 and 71% fewer than Kimi K2.6.
- The ACE-RTL agent consists of a generator, a reflector, and a coordinator to manage iterative design refinement.
- Nemotron 3 Ultra's architecture and training on a rubric-filtered, synthetic RTL dataset support high-throughput, low-cost, long-context inference.
Context
According to the NVIDIA Developer Blog, modern chip design is increasingly constrained by engineering time, particularly in RTL development and verification. These processes demand specialized hardware knowledge, precise reasoning, and frequent interaction with electronic design automation (EDA) tools. While large language models (LLMs) have accelerated code generation, AI agents extend this impact by using verification feedback to iteratively correct errors, which is crucial for RTL where correctness depends on precise temporal behavior and tool-based validation.
Why It Matters
The combination of NVIDIA Nemotron 3 Ultra and the ACE-RTL agent offers a practical foundation for integrating AI into leading EDA tools from Cadence, Siemens, and Synopsys. This approach can help address the engineering time limitations in chip design by improving the accuracy and efficiency of RTL development and verification, potentially allowing more RTL tasks to be completed within existing compute budgets.
What To Do
- Note the performance metrics of Nemotron 3 Ultra in agentic RTL coding compared to other models.
- Consider the implications of reduced token usage for inference costs in iterative design workflows.
- Watch for integrations of Nemotron 3 Ultra with EDA tools from Cadence, Siemens, and Synopsys.
- Review the iterative generate-test-reflect approach used by the ACE-RTL agent for potential application in other complex coding tasks.